In some applications, a manufacturer or designer of electronics equipment wishes to prevent third parties from reverse engineering such equipment (at for example, the unit or system level, board level, or component level). One approach to doing this is to include a mechanical lock that is designed to prevent a case (or other enclosure) from being opened (or to otherwise prevent the contents of the case from being physically accessed) when locked. Such a mechanical lock does not, however, prevent access to those interfaces that are physically accessible from outside of the case or other enclosure (for example, a debug interface such as an interface supporting the Institute for Electrical and Electronics Engineers (IEEE) 1149.1 Standard (also referred to here as a “JTAG” interface)).
Some reverse-engineering techniques access electronics enclosed within a mechanically locked case by communicating with such electronics using externally accessible interfaces. For example, a debug interface is typically designed to provide a mechanism by which an external device is able to inspect and change the state of various items of electronics contained within such a mechanically locked case (for example, by inspecting and/or changing the state of registers, memory, or I/O interfaces). Thus, such a debug interface can be exploited in some cases to reverse engineering such equipment.